This invention relates generally to analog integrated circuits, and more particularly to operational amplifiers.
Operational amplifiers, more commonly known as "op-amps," are the core component in analog integrated circuits ("ICs"). An ideal operational amplifier is a differential input, single-ended or differential-ended output amplifier having infinite gain, infinite input impedance, and zero output impedance. Thus, the operational amplifier is well suited for a variety of applications in integrated circuits.
Real operational amplifiers, however, deviate from ideal behavior in significant ways. The principal effects of these deviations are (1) to limit the frequency range of the signals that can be accurately amplified; (2) to place a lower limit on the magnitude of the signals that can be detected; and (3) to place an upper limit on magnitudes of the impedance of passive elements that can be used in a feedback network with the amplifier. Thus, the gain and speed of an op-amp is compromised by the non-ideal behavior of the op-amp. In many analog ICs, the gain and speed of op-amps are the most important specifications because they ultimately determine the achievable accuracy and speed of the overall analog circuit embodied in the IC. Many design techniques have been developed to produce more ideal op-amps. Many of those techniques, however, trade off gain for speed or vice-versa. A well established technique which optimizes both gain and speed is known as gain enhancement technique.
A fully-differential folded cascode op-amp using the gain enhancement technique is shown in FIG. 1. The circuit shown is described in "A Fast-Settling CMOS Op Amp for SC Circuits with 90-dB DC gain," by Klass Bult and Govert J. G. M. Geelen, IEEE Journal of Solid State Circuits, Vol. 25, No. 6, Dec. 1990, pp. 1379-1384. The folded-cascode operational amplifier of FIG. 1 is comprised of a differential input section including FETS M1-M4, a cascode mirror section including FETS M5-M8, and a cascode current source section including FETs M9-M12. Auxiliary amplifiers A1-A4 are used to provide the gain enhancement, as described further below. The circuit shown in FIG. 1 is more accurately described as an operational transconductance amplifier ("OTA") because of an absence of an output stage. The transconductance amplifier is used heavily in switched capacitor ("SC") applications. The gain enhancement technique increases the output impedance of the cascode current sources through the use of negative feedback by auxiliary amplifiers A1-A4 coupled between the drain and gate of the associated cascode current transistors M7-M10, respectively. The basic operation of the gain enhancement technique can be illustrated by considering the operation of one of the cascode current sources in isolation as follows.
In FIG. 2, a cascode current source is formed by cascode transistors M9 and M11 and the corresponding auxiliary amplifier A3 of FIG. 1. In operation, if the output voltage VOUT changes, the voltage at node A will change because transistors M9 and M11 form a voltage divider. If the auxiliary amplifier A3 were not present, the voltage change in node A would produce a corresponding current change in IOUT. The auxiliary amplifier increases the output impedance of the cascode current source by means of negative feedback voltage to node A such that the voltage at node A remains constant as VOUT changes, which in turn keeps the current IOUT constant. The less the current IOUT changes as the voltage VOUT changes, the higher the output impedance. The resulting output impedance of the current source is now approximately the output impedance of the cascode transistors multiplied by the gain of the auxiliary amplifier. The output impedance of the other cascode current sources is similarly increased such that the overall output impedance of the folded cascode amplifier of FIG. 1 is increased.
The drawback of the above-described gain enhancement technique is that it increases the noise sensitivity of the op-amp. Particularly problematic for the op-amp of FIG. 1 is noise injected into the substrate on which the op-amp is formed. Substrate noise is typically generated by high-speed switching of digital circuits in a mixed analog/digital circuit. The substrate noise is non-uniformly distributed across the substrate depending on the switching behavior of the digital circuit. The substrate noise is coupled into the auxiliary amplifiers through parasitic capacitances associated with the auxiliary amplifier transistors.
The op-amp circuit shown in FIG. I is sensitive to substrate noise because of the circuit topology. The auxiliary amplifiers are formed independently from each other and are positioned relative to an associated cascode transistor. Because the auxiliary amplifiers are physically separated from each other on the substrate, different levels of substrate noise are coupled to the different auxiliary amplifiers. The different level of substrate noise cause each auxiliary amplifier to generate a different feedback voltage to the associated cascode transistor. The various feedback voltages produces an undesirable perturbation in the output voltage VOUT of the op-amp.
Accordingly, a need remains for a high-gain operational amplifier having a reduced sensitivity to noise.